Informações sobre o curso
2,029

100% online

Comece imediatamente e aprenda em seu próprio cronograma.

Prazos flexíveis

Redefinir os prazos de acordo com sua programação.

Nível intermediário

Experience with IDE environment for Digital Design, C programming, motivation to complete hands on projects.

Aprox. 9 horas para completar

Sugerido: 3 weeks of study, roughly 6 hours/week if you have the necessary prerequisities....

Inglês

Legendas: Inglês

O que você vai aprender

  • Check

    Apply FPGA design and implementation to engineering problems/challenges.

  • Check

    Understand the components of a soft core processor system inside an FPGA and apply this understanding to a project.

  • Check

    Categorize the types of external memory interfaces supported by FPGA devices.

  • Check

    Employ computer aided design tools to design, verify, and implement embedded systems.

Habilidades que você terá

Embedded Csystem verificationFPGA design

100% online

Comece imediatamente e aprenda em seu próprio cronograma.

Prazos flexíveis

Redefinir os prazos de acordo com sua programação.

Nível intermediário

Experience with IDE environment for Digital Design, C programming, motivation to complete hands on projects.

Aprox. 9 horas para completar

Sugerido: 3 weeks of study, roughly 6 hours/week if you have the necessary prerequisities....

Inglês

Legendas: Inglês

Programa - O que você aprenderá com este curso

Semana
1
5 horas para concluir

Hardware setup and verification for DE10-Lite with VGA monitor output

Focus on the use of hardware platform with detailed support for key steps necessary to launch solutions from demonstration folders provided by manufacturer of FPGA systems. Examples provided with an emphasis on video. Additional resources are pointed out for access. Peer review assignment evaluates understanding of key concepts in FPGA design software and interaction with TPG and CVO Video IP blocks. ...
10 vídeos (total de (Total 48 mín.) min), 3 leituras, 2 testes
10 videos
Unboxing hands on demo of DE10-Lite3min
Accessing Demo Board Resources from Terasic5min
Overview of Test Pattern to VGA output demo9min
USB Blaster driver setup2min
Hands on VGA in RTL Demonstration3min
Video IP Suite Overview6min
Video Test Pattern Demo in IP4min
Embedded System Interface to VGA Project with IP6min
Demo of VGA Output with IP project5min
3 leituras
Review of Terasic User Manual30min
Review of Video IP manual30min
Overview of Programming Assignment10min
1 exercício prático
Comprehension of DE10-Lite Capabilities10min
Semana
2
5 horas para concluir

Methods and approaches for testing FPGA designs

Overview of tools for design verification for functionality and performance. Discussion of system console capabilities using TCL scripts with emphasis on board bring up and processor evaluation. Description of embedded logic analyzer capabilities with triggering for state transition verification and logic operation along with capabilities to store results for data analysis. Brief introduction to external memory evaluation capabilities to be discussed in future modules....
11 vídeos (total de (Total 62 mín.) min), 1 leitura, 2 testes
11 videos
System Console Overview with access and tool flow4min
System Console Supported Capabilities and Links7min
System Console Board Bring up Capabilities6min
System Console Processor evaluation6min
Demo with T-bird Tail lights - Quartus Project to programming4min
Logic Analysis in FPGA Overview4min
NIOS II Development: Triggering Concepts for Design Verification4min
ELA Software Configuration5min
Traffic Light Project Overview6min
Signal Tap Demo with Traffic Light Controller example6min
1 leituras
Debugging in System Consoles
1 exercício prático
Review of System Console Capabilities15min
Semana
3
3 horas para concluir

NIOS II IP for Video and Performance Monitoring

This module covers the use of additional Video IP suite modules with emphasis on the bus interfaces used for streaming along with more test modules that are available in System Console for verification. Introduction to custom IP blocks is provided using TCL and the Custom IP capabilities in the Soft Processor environment of Qsys provided by the Intel development tools for FPGA design....
4 vídeos (total de (Total 48 mín.) min), 3 leituras, 1 teste
4 videos
Avalon-ST Testing Video with IP and System Console5min
Video Monitoring Example11min
Camera Module Overview20min
3 leituras
Module 3 Introduction1min
IP Manual Reviews
8 MEGA Pixel Camera Manual10min
1 exercício prático
Cumulative Quiz for Modules 1-330min

Instrutores

Avatar

Kim Newman Frey

Sr. Research Associate
Electrical, Computer and Energy Engineering (ECEE)

Sobre Universidade do Colorado em Boulder

CU-Boulder is a dynamic community of scholars and learners on one of the most spectacular college campuses in the country. As one of 34 U.S. public institutions in the prestigious Association of American Universities (AAU), we have a proud tradition of academic excellence, with five Nobel laureates and more than 50 members of prestigious academic academies....

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