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Certificados compartilháveis
Tenha o certificado após a conclusão
100% on-line
Comece imediatamente e aprenda em seu próprio cronograma.
Prazos flexíveis
Redefinir os prazos de acordo com sua programação.
Nível iniciante
Aprox. 46 horas para completar
Inglês

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Politecnico di Milano

Programa - O que você aprenderá com este curso

Semana
1

Semana 1

6 horas para concluir

A Bird's Eye View on Adaptive Computing Systems

6 horas para concluir
7 vídeos (Total 29 mín.), 5 leituras, 5 testes
7 videos
Reconfiguration in Everyday Life2min
The Needs for Adaptation: an overview4min
FPGA and reconfiguration: a 1st definition5min
Runtime management2min
Programmable System-on-Chip4min
Programmable System-on-Multiple Chip6min
5 leituras
Self-Aware Adaptation in FPGA-based Systems [suggested readings]30min
Self-Awareness as a Model for Designing and Operating Heterogeneous Multicores [suggested readings]1h
Reconfigurable computing: a survey of systems and software [suggested readings]2h
ReconOS: An Operating System Approach for Reconfigurable Computing [suggested readings]30min
R3TOS-Based Autonomous Fault-Tolerant Systems [suggested readings]30min
5 exercícios práticos
Reconfigurations15min
History of Reconfiguration8min
FPGA and reconfiguration30min
Programmable SoC Vs SoMCs7min
Runtime management30min
6 horas para concluir

An introduction to Reconfigurable Computing

6 horas para concluir
5 vídeos (Total 27 mín.), 4 leituras, 2 testes
5 videos
Reconfigurable Computing: HW vs SW3min
On how to improve the Reconfigurable computing performance via CAD improvements3min
FPGA-Based Reconfigurable Computing3min
System design space exploration and rationale behind partial reconfiguration15min
4 leituras
A platform-independent runtime methodology for mapping multiple applications onto FPGAs through resource virtualization [suggested readings]45min
A Heterogeneous Multicore System on Chip with Run-Time Reconfigurable Virtual FPGA Architecture [suggested readings]1h
Partitioning and Scheduling of Task Graphs on Partially Dynamically Reconfigurable FPGAs [suggested readings]1h
A Mapping-Scheduling Algorithm for Hardware Acceleration on Reconfigurable Platforms [suggested readings]1h 30min
2 exercícios práticos
Reconfigurable Computing Module30min
Performance30min
Semana
2

Semana 2

5 horas para concluir

Reconfigurable Computing and FPGAs

5 horas para concluir
8 vídeos (Total 36 mín.), 3 leituras, 2 testes
8 videos
FPGA Basic Block: CLBs and IOBs6min
FPGA Basic Block: Interconnections5min
FPGA Configuration: an overview2min
More Details on How To Configure and FPGA: the bitstream files4min
Bitstream Composition4min
Configuration Registers6min
How to handle the complexity of an FPGA-based system4min
3 leituras
Note on the "Resources"1min
Physical design for FPGAs [suggested readings]1h 30min
Multi-Million Gate FPGA Physical Design Challenges [suggested readings]1h 30min
2 exercícios práticos
Getting familiar with FPGAs34min
FPGA configuration and Bitstream30min
2 horas para concluir

Examples on how to configure an FPGA

2 horas para concluir
6 vídeos (Total 42 mín.)
6 videos
From the LUT to the CLB configuration example8min
A simplified FPGA and its configuration settings4min
An Example on how to implement a circuit on a simplified FPGA8min
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - CLBs5min
An Example on how to implement a circuit on a simplified FPGA: bitstram generation phase - SBs and routing4min
2 exercícios práticos
LUT and CLB30min
Physical design30min
Semana
3

Semana 3

6 horas para concluir

An Introduction to Reconfigurations

6 horas para concluir
5 vídeos (Total 35 mín.), 2 leituras, 2 testes
5 videos
The 5 W's6min
Reconfigurable Computing as an Exstension of HW/SW Codesing5min
A Classification of SoC Reconfigurations8min
A Classification of SoMC Reconfigurations9min
2 leituras
Design methodology for partial dynamic reconfiguration: a new degree of freedom in the HW/SW codesign [suggested readings]1h
Performance of partial reconfiguration in FPGA systems: A survey and a cost model [suggested readings]3h
2 exercícios práticos
Functionalities and their implementations30min
Module Review30min
6 horas para concluir

Towards Partial Dynamic Reconfiguration and Complex FPGA-based systems

6 horas para concluir
8 vídeos (Total 40 mín.), 4 leituras, 2 testes
8 videos
How to use FPGA Reconfiguration to face area issues5min
How to deal with the Reconfiguration runtime overhead3min
Recurring modules to reuse them to reduce the Reconfiguration time3min
Partial Reconfiguration to reduce the Reconfiguration runtime overhead5min
Runtime management to explore alternative implementations5min
Bitstreams relocation6min
Bitstreams relocation and virtual homogeneity3min
4 leituras
Operating system runtime management of partially dynamically reconfigurable embedded systems [suggested readings]1h
Core Allocation and Relocation Management for a Self Dynamically Reconfigurable Architecture [suggested readings]1h
A runtime relocation based workflow for self dynamic reconfigurable systems design [suggested readings]1h
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux [suggested readings]1h 30min
2 exercícios práticos
Reconfigurable System30min
Partial reconfiguration30min
Semana
4

Semana 4

10 horas para concluir

Design Flows

10 horas para concluir
9 vídeos (Total 54 mín.), 7 leituras, 3 testes
9 videos
Partial Reconfiguration Design Flows4min
Xilinx Difference Based Partial Reconfiguration5min
Xilinx Module Based Partial Reconfiguration5min
Xilinx Partial Reconfiguration (PR) Flow5min
Moudle Based vs Partial Reconfiguration Design Flows17min
Rationale behind DRESD and the work done by the Politecnico di Milano3min
From DRESD to CHANGE and ASAP, two new research initiatives from the Politecnico di Milano4min
CAOS: from embedded to heterogeneous distributed FPGA-based computing systems3min
7 leituras
Vivado Design Suite Tutorial, Partial Reconfiguration, UG947 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]1h 30min
Vivado Design Suite User Guide, Partial Reconfiguration, UG909 (v2016.1) April 6, 2016 [suggested readings - handbook - PDF]3h
Dynamic Reconfigurability in Embedded System Design [suggested readings]30min
A design methodology for dynamic reconfiguration: the Caronte architecture [suggested readings]30min
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation [suggested readings]45min
Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project [suggested readings]30min
The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems [suggested readings]30min
3 exercícios práticos
Abstractions30min
Politecnico di Milano Partial Reconfiguration Research Initiatives30min
Design flows30min
6 horas para concluir

Closing remarks and future directions

6 horas para concluir
1 vídeo (Total 5 mín.), 3 leituras, 1 teste
3 leituras
Virtualized Execution Runtime for FPGA Accelerators in the Cloud [suggested readings]1h 45min
A cloud-scale acceleration architecture [suggested readings]2h
Enabling Flexible Network FPGA Clusters in a Heterogeneous Cloud Data Center [suggested readings]1h 30min
1 exercício prático
Closing remarks and future directions30min

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