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Up to now, we have addressed devices built under the geometry of a diode,

that is, two terminal devices.

In practice, most electronic circuits also

comprise transistors, which are three terminal devices.

To better apprehend the operating mode of a transistor,

let's go back to the vacuum diode.

Remember: In the vacuum diode,

electrons emitted by a heated cathode can

reach the anode when this electrode is positively biased.

In 1906 the American inventor,

Lee de Forest had the idea to interpose a third element,

a grid, between the cathode and the anode.

This new device is called triode.

When the grid is positively biased,

electrons pass through it and reach the anode, so nothing changes.

However, when the grid is negatively biased,

electrons are stopped and the current is interrupted.

So the current through the triode is now controlled by the voltage applied to the grid.

The device can be used either as an amplifier or as an electrically controlled switch.

1948 marks the starting point of modern solid-state based electronics.

Why?

This was actually the date of the invention of the transistor,

which at that time presented as the solid state equivalent of the vacuum triode.

The Organic Field-Effect Transistor

or OFET is made of a semiconductor and three electrodes.

The source and the drain are directly connected to the semiconductor.

The third electrode is the gate which is isolated

from the semiconductor by an electrically insulating film.

What is the interest of inserting

an insulator knowing that no current can pass through it?

Let's first look at the case with an n-type semiconductor.

When no bias is applied we are at equilibrium and the energy bands are flat.

If we apply a negative voltage to the gate, an electric field is

induced in the semiconductor that oppose any injection of electrons.

Let's call this the dielectric regime because in that case,

the organic semiconductors behaves like a dielectric.

When the gate bias is positive,

electrons are now injected into the semiconductor but they are

stopped by the insulator so they accumulate at the insulator-semiconductor interface.

This is called the accumulation regime.

With a p-type semiconductor the situation is the same but exactly reversed.

The dielectric regime now occurs under

positive gate bias and accumulation of holes under negative gate bias.

In practice, the equilibrium

or flat bands regime, does not necessarily correspond to zero gate bias.

Instead, the accumulation regime starts at finite voltage, called threshold voltage.

This may be due to different work function at the source and gate electrodes, or to

the presence of unwanted electrical charges at the semiconductor-insulator interface.

The diode we have described is called

Metal-Insulator-Semiconductor, or MIS diode.

It is of practical interest to see the MIS diode as a capacitor.

In a capacitor charges are accumulated at the electrodes when a bias is applied.

We have accumulation of negative charges at

an n-type semiconductor and positive charges at a p-type semiconductor.

The amount of the accumulated charge per unit area is given by

the capacitance of the insulator c_sub_i times

the gate voltage corrected for the threshold voltage.

Let's first give a qualitative description

of the operation of an n-type organic transistor.

First, we apply between source and gate a voltage above threshold.

Electrons accumulate at the insulator-semiconductor interface,

thus forming a conductive channel between source and drain.

If we now apply a small voltage between source and drain,

a current flows, which is proportional to the drain voltage.

This corresponds to the linear regime, which applies up to

the point when the source-drain voltage equals the source-gate voltage.

At this point there is a breaking of the conducting channel near the drain.

This is called the pinch off point.

Beyond this point one enters the saturation regime where the current remains constant,

whichever the value of the source-drain voltage.

Let's now quantitatively calculate the current.

We define the x axis along

the source-drain direction and consider an elemental strip of length d_x.

The strip is better seen in the top view of the device.

Here W is called the width of the channel.

The charge d_q of the elemental strip corresponds to the charge of a capacitor.

It is given by the capacitance of the insulator times the voltage at the coordinate x,

that is v_g_s minus v threshold minus a voltage v_x due

to the source-drain voltage times the area of the strip, W times d_x.

The current is the derivative of the charge with time,

which decomposes into the derivative of the charge with distance x,

times the derivative of the distance with time, d_x over d_t.

Note that d_x over d_t is simply the mean speed

of the charge carriers which can be written as the mobility times the electric field,

the latter being the derivative of the potential with distance d_v over d_x.

Mixing all that, we finally get: drain current times d_x

equals the capacitance times

W, times the mobility, times v_g_s minus v threshold minus v_x, times d_v.

Finally, we integrate this expression from source to drain.

On the left-hand side we integrate over the length L of the conducting channel,

while on the right-hand side we integrate over the

potential from zero at source to v_d_s at drain.

After integration the current includes a term

proportional to the source-drain voltage minus a quadratic term.

So it is linear only at very low source-drain bias.

Plotting the current as a function of the source-drain voltage for

various values of the source-gate voltage gives a set of so-called output curves.

At low voltage we have the linear regime but because of the squared term,

the curve actually have the shape of a parabola pointing downwards.

The maximum of the parabola corresponds to the pinch-off point,

beyond which we enter the saturation regime when the current is constant.

The equation for the saturation current is obtained by

substituting v_d_s by v_g_s minus v threshold into the equation for the linear regime.

Actually the organic semiconductor

have different flavors depending on the respective position of the electrodes.

We can have bottom or

top gate electrode as well as bottom or top source and drain electrodes,

thus offering four different configurations.

In the next lecture we will go in more details

on the operating mode of the organic transistor.

Thank you for your attention.