So far in our long-channel discussions, we had assumed that the source and drain
are far away from each other, so they can be, their, their effect can be neglected
over most of the channel. Now, we will allow them to approach each
other and we will discuss how we can take their presence into account in the I-V
equations for the MOS transistor. We will also consider the case where the
channel is not short, but rather it is narrow as opposed to being wide enough
for edge effects on the side to be effected.
So we'll discuss both short channel effects and narrow channel effects.
All of these effects collectively will go by the name of charge sharing.
And you will see the reasons why very shortly.
Let us begin with a reminder. We are talking about short channel
effects. More generally, small-dimension effects,
but in this case, we start with a short channel.
The drain and the source are assumed to be near each other, so we cannot neglect
their presence over most of the channel. I mentioned that you need
two-dimensional, even three-dimensional analysis, if you also have a small width
and these are very, very slow analysis. They have to be done numerically.
We set it up for fast computation. We need approximate analytical models.
And we try to save the long channel expressions by suitably modifying them to
take care of short channel, and in general, small-dimension effects.
I will repeat again, that often, the a h, the steps taken to arrive at such
expressions are not well-justified. empirical approximations are used widely,
and even the parameter values in the empirical expressions need to be
adjusted, again empirically, to make them agree with measurements.
So I will provide the sketch of such approaches for the case of short channel
device and then for narrow channel devices.
Let me first assume that VDS is very small.
A long channel device then would look like this, because VDS is very, very
small, then VSB and VDB are practically the same, the channel is very long.
So what happens around the source and around the drain can be neglected over
practically all of the channel, which is equivalent to saying, instead of this
situation, we have this situation. It, basically, what we did is derive long
channel expressions, assuming this picture over here.
The field is always practically vertical, and we use three terminal MOS structure
expressions, and we went through the derivations we've seen.
Now, if I have a short channel device, then things look like that.
Now, the field is two-dimensional, as we've said again and again.
It may be vertical near the center of the device, but certainly would not be
vertical near the source and near the drain.
Now, in the case of the long channel device over here, all of the depletion
region and all of the inversion layer, are there because of the field coming
from the positive charges from the gate. You can think of vertical field lines,
which terminate on charges in the channel, either depletion region charges
or inversion layer charges. All of the charges here appear, thanks to
the gate and the voltage we apply between the gate and the body or gate and the
source. But here, you have three structures close
to the channel. One is the gate, the other is the source,
and the other is the drain. All of these three structures are close
to the channel, so they all contribute to the charges in it.
The field lines emanting from the gate. And the field lines eminating from the
source, and the field lines eminating from the drain, all help to deplete the
region, and then invert the surface. So the gate has some help from the other
two regions, that are on the other channel.
So now, if you make the approximation, that things should look like that, it
follows you're going to make a big error in your calculations, whereas this here
was reasonable for the long tunnel device.
This approximation is not reasonable for this device.
If you insist on using long tunnel expressions, at least you have to modify
the values of perimeters in it to make this.
Approximate this situation in terms of the current it predicts.
So we have a, the so-called two-dimensional charge sharing, where the
that the job of depleting and inverting the channel is shared by three
structures, gate, source and drain. And, as a result of the help the gate
gets in depleting and inverting the channel, there is an increase in the
surface potential. So that means that even with a smaller
gate voltage than before, than what you had in the long channel case, the channel
can be inverted. Effectively, the surface potential
increases, and of course if you apply a larger drain voltage, now, you are
helping this even more. Just like when you apply a positive
voltage on the gate, you help invert the channel.
When you apply a more positive voltage on the drain, you have invert the channel,
basically for the same reason. So when you plot the I-V characteristics,
if you assume the long channel behavior like this, you would expect this type of
behavior. But instead, for a given VGS, what you
measure is a significantly larger current, like this.
Now, instead of saying that, this curve moves vertically like that.
It's more correct to say that this curve moves horizontally to the left.
So this expected long channel behavior, actually, should be modified and give you
this short channel behavior. You may remember, that with a very small
VDS, if you extrapolate this here, the quantity that you get at this point is
called the threshold voltage v sub t. If you do the same thing for the measured
quantity over here. You get a new quantity which we will
denote by V t hat. And it will be called the effective
threshold. So in such analysis the main task is to
find. The right value for the effective
threshold so that the measurements match your equations.
And I will show you an example of how this is done now.
First of all, if I ignore the effect of source and drain, in which case, we have
this situation as we showed before. We know that the threshold is given by
this expression. This goes back to our discussion of
strong inversion. This is the bulk charge per unit area.
This is the oxide capacitance per unit area.
Now, because I'm neglecting the source and drain here, the charged by unit area
is uniform, I'm assuming negligible, VDS remember, so there is basically no
voltage drop across the inversion layer. The charge is uniform and so I can
multiply by the gate area, both numerator and denominator.