Learning to speak Verilog (intro)

Loading...
Visualizar o programa do curso

Habilidades que você aprenderá

Writing Code in Verilog, Simulating FPGA Designs, Designing FPGA Logic, Designing Test Benches, Writing code in VHDL

Avaliações

4.3 (210 classificações)
  • 5 stars
    51.42%
  • 4 stars
    34.28%
  • 3 stars
    7.61%
  • 2 stars
    1.90%
  • 1 star
    4.76%
KH

Jul 14, 2020

I had the opportunity to learn both VHDL and Verilog in same course. And compare the constructs of these two HDLs. Thank you very much. Best Regards

VV

Jan 16, 2020

Great experience. Nice learning opportunity. However, please include assignments which are little more diverse and difficult.

Na lição
Verilog and System Verilog Design Techniques

Ministrado por

  • Timothy Scherr

    Timothy Scherr

    Senior Instructor and Professor of Engineering Practice
  • Benjamin Spriggs

    Benjamin Spriggs

    Lecturer and Scholar of Engineering Practice

Explore nosso catálogo

Registre-se gratuitamente e obtenha recomendações, atualizações e ofertas personalizadas.